Disable "Autocompletion"/"Abbreviation" in Verilog-Mode

Question

When I use the Verilog Mode in spacemacs with evil keybindings, every time I type e.g. wire and press ESC, an automatic dialouge pops up and asks me msb:, lsb: and name (RET to end). This is super annoying, since pressing ESC in the prompt often leads to three blank lines and an open bracket.

Apparently this is defined in the verilog-define-abbrev-table in the verilog-mode.el, but I don't speak lisp, nor do I have deeper knowledge of emacs packages.

Changing the verilog-mode.el file is not possible, since I'm working on a multi user Server without sudo rights.

How can I disable the whole abbreviation-autocompletion stuff in the verilog mode?

I'm not 100% sure, but I think that abbrev minor mode is disabled — Jounathaen, Jan 30 '18 at 15:57
Ok, editing the abbrev file with `edit-abbrevs` helps, but this buffer gets reset after a restart. How to disable the abbrevs or clean the table? — Jounathaen, Jan 30 '18 at 16:45

score 3 · Accepted Answer · answered Jan 30 '18 at 16:59

3

Found the Solution: the verilog-mode does fill the "abbrev-table" every time it gets initialized.

I added a hook to my spacemacs-dotfile which clears the table after the mode is initialized:

(defun my-verilog-setup ()
    (clear-abbrev-table verilog-mode-abbrev-table))
(add-hook 'verilog-mode-hook #'my-verilog-setup)

answered Jan 30 '18 at 16:59

Jounathaen

151
7

1

Please don't forget to accept your answer after the grace period. – Tobias Jan 30 '18 at 17:27
This is super useful... nicely done. – triplebig Sep 13 '18 at 23:35
This was driving me insane, thank you so much! – Alex Shroyer Oct 04 '18 at 21:23

score 0 · Answer 2 · answered Apr 04 '19 at 10:38

I found an alternative solution, which is to set evil-want-abbrev-expand-on-insert-exit to non-nil. This way, you can still keep the abbrev, either by enabling the mode or via C-x a e or expand-abbrev.

I just customized the variable via SPC h d v (there are other ways of course). In the help of that variable, it says "This variable is read only on load.", which meant a refresh of .spacemacs via SPC f e R didn't set this to the new value. Without knowing another way, a restart of spacemacs did the job.

Disable "Autocompletion"/"Abbreviation" in Verilog-Mode

2 Answers2